HAL XSPI typical use cases for migration ¶
This section provides information about the HAL XSPI Typical use cases for migration.
Configuring an Octal PSRAM memory in memory-mapped mode and perform a read/write operations ¶
Sequence diagram ¶
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HAL1 |
HAL2 |
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Usage ¶
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HAL1 |
HAL2 |
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XSPI_HandleTypeDef xspi;
xspi.Instance = XSPI;
xspi.Init.FifoThresholdByte = 4;
xspi.Init.MemoryMode = HAL_XSPI_SINGLE_MEM;
xspi.Init.MemoryType = HAL_XSPI_MEMTYPE_APMEM_16BITS;
xspi.Init.MemorySize = HAL_XSPI_SIZE_256MB;
xspi.Init.WrapSize = HAL_XSPI_WRAP_NOT_SUPPORTED;
xspi.Init.ClockMode = HAL_XSPI_CLOCK_MODE_0;
xspi.Init.ChipSelectBoundary = HAL_XSPI_BONDARYOF_8KB;
xspi.Init.ClockPrescaler = 1;
xspi.Init.SampleShifting = HAL_XSPI_SAMPLE_SHIFT_NONE;
xspi.Init.DelayHoldQuarterCycle = HAL_XSPI_DHQC_DISABLE;
xspi.Init.ChipSelectHighTimeCycle = 0x1U;
xspi.Init.MaxTran = 0;
xspi.Init.Refresh = 0;
xspi.Init.FreeRunningClock = HAL_XSPI_FREERUNCLK_DISABLE;
HAL_XSPI_Init(&xspi);
XSPI_RegularCmdTypeDef scommand = {0};
scommand.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;
scommand.IOSelect = HAL_XSPI_SELECT_IO_7_0;
scommand.Instruction = WRITE_REG_CMD;
scommand.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;
scommand.InstructionWidth = HAL_XSPI_INSTRUCTION_8_BITS;
scommand.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_DISABLE;
scommand.Address = 0xFFFFFFFF;
scommand.AddressMode = HAL_XSPI_ADDRESS_8_LINES;
scommand.AddressWidth = HAL_XSPI_ADDRESS_16_BITS;
scommand.AddressDTRMode = HAL_XSPI_ADDRESS_DTR_ENABLE;
scommand.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;
scommand.DataMode = HAL_XSPI_DATA_8_LINES;
scommand.DataDTRMode = HAL_XSPI_DATA_DTR_ENABLE;
scommand.DataLength = 2;
scommand.DummyCycles = 0;
scommand.DQSMode = HAL_XSPI_DQS_DISABLE;
HAL_XSPI_Command(&xspi, &scommand, XSPI_TIMEOUT);
XSPI_MemoryMappedTypeDef sMemMappedCfg;
sMemMappedCfg.TimeOutActivation = HAL_XSPI_TIMEOUT_COUNTER_ENABLE;
sMemMappedCfg.TimeoutPeriodClock = 0x34;
HAL_XSPI_MemoryMapped(&xspi, &sMemMappedCfg);
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HAL_XSPI_Init(&xspi, HAL_OCTOSPI1);
/* Main peripheral configuration */
memory_config.mode = HAL_XSPI_MEMORY_SINGLE;
memory_config.type = HAL_XSPI_MEMORY_TYPE_APMEM_16BIT;
memory_config.size_bit = HAL_XSPI_MEMORY_SIZE_256MBIT;
memory_config.wrap_size_byte = HAL_XSPI_WRAP_NOT_SUPPORTED;
memory_config.clock_polarity = HAL_XSPI_CLOCK_LOW;
memory_config.cs_boundary = HAL_XSPI_CS_BOUNDARY_NONE;
timing_config.clk_prescaler = 0x1U;
timing_config.shift = HAL_XSPI_SAMPLE_SHIFT_NONE;
timing_config.hold = HAL_XSPI_DELAY_HOLD_NONE;
timing_config.cs_high_time_cycle = 0x1U;
timing_config.cs_release_time_cycle = 0x0U;
timing_config.cs_refresh_time_cycle = 0x0U;
timing_config.dlyb_state = HAL_XSPI_DLYB_ON;
xspi_config.memory = memory_config;
xspi_config.timing = timing_config;
if (HAL_XSPI_SetConfig(&hOCTOSPI1, &xspi_config) != HAL_OK)
{
return NULL;
}
command.operation_type = HAL_XSPI_OPERATION_COMMON_CFG;
command.io_select = HAL_XSPI_IO_7_0;
command.instruction = WRITE_REG_CMD;
command.instruction_mode = HAL_XSPI_INSTRUCTION_8LINES;
command.instruction_width = HAL_XSPI_INSTRUCTION_8BIT;
command.instruction_dtr_mode_status = HAL_XSPI_INSTRUCTION_DTR_DISABLED;
command.addr = 0xFFFFFFFF;
command.addr_mode = HAL_XSPI_ADDR_8LINES;
command.addr_width = HAL_XSPI_ADDR_8BIT;
command.addr_dtr_mode_status = HAL_XSPI_ADDR_DTR_ENABLED;
command.alternate_bytes_mode = HAL_XSPI_ALTERNATE_BYTES_NONE;
command.data_mode = HAL_XSPI_REGULAR_DATA_8LINES;
command.data_dtr_mode_status = HAL_XSPI_DATA_DTR_ENABLED;
command.size_byte = 2;
command.dummy_cycle = 0;
command.dqs_mode_status = HAL_XSPI_DQS_DISABLED;
HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);
hal_xspi_memory_mapped_config_t mem_mapped_cfg;
mem_mapped_cfg.timeout_activation = HAL_XSPI_TIMEOUT_ENABLE;
mem_mapped_cfg.timeout_period_cycle = 0x34;
HAL_XSPI_StartMemoryMappedMode(&xspi, &mem_mapped_cfg);
HAL_XSPI_StopMemoryMappedMode(&xspi);
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Initialization and configuration of an Hyperbus memory ¶
Sequence diagram ¶
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HAL1 |
HAL2 |
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Usage ¶
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HAL1 |
HAL2 |
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/* XSPIM configuration is mentioned in the use case :
Memory initialization using XSPIM configuration */
XSPI_HandleTypeDef hxspi;
hxspi.Instance = XSPI;
hxspi.Init.MemoryMode = HAL_XSPI_SINGLE_MEM;
hxspi.Init.MemoryType = HAL_XSPI_MEMTYPE_HYPERBUS;
hxspi.Init.MemorySize = HAL_XSPI_SIZE_16B;
hxspi.Init.WrapSize = HAL_XSPI_WRAP_NOT_SUPPORTED;
hxspi.Init.ClockMode = HAL_XSPI_CLOCK_MODE_0;
hxspi.Init.ChipSelectHighTimeCycle = 1;
hxspi.Init.ClockPrescaler = 1;
hxspi.Init.SampleShifting = HAL_XSPI_SAMPLE_SHIFT_NONE;
hxspi.Init.DelayHoldQuarterCycle = HAL_XSPI_DHQC_DISABLE;
hxspi.Init.ChipSelectBoundary = HAL_XSPI_BONDARYOF_NONE;
hxspi.Init.MaxTran = 0;
hxspi.Init.Refresh = 0;
HAL_XSPI_Init(&hxspi);
sHyperBusCfg.RWRecoveryTimeCycle = 0;
sHyperBusCfg.AccessTimeCycle = 0;
sHyperBusCfg.WriteZeroLatency = HAL_XSPI_NO_LATENCY_ON_WRITE;
sHyperBusCfg.LatencyMode = HAL_XSPI_VARIABLE_LATENCY;
HAL_XSPI_HyperbusCfg(&hxspi, &sHyperBusCfg, XSPI_TIMEOUT);
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/* XSPIM configuration as mentioned in the use case :
Memory initialization using XSPIM configuration */
hal_xspi_handle_t hOCTOSPI1;
HAL_XSPI_Init(&hOCTOSPI1, HAL_OCTOSPI1);
hal_xspi_config_t xspi_config;
hal_xspi_memory_config_t memory_config;
hal_xspi_timing_config_t timing_config;
hal_xspi_hyperbus_config_t hyperbus_config;
memory_config.mode = HAL_XSPI_MEMORY_SINGLE;
memory_config.clock_polarity = HAL_XSPI_CLOCK_LOW;
memory_config.type = HAL_XSPI_MEMORY_TYPE_HYPERBUS;
memory_config.size_bit = HAL_XSPI_MEMORY_SIZE_16BIT;
memory_config.wrap_size_byte = HAL_XSPI_WRAP_NOT_SUPPORTED;
memory_config.cs_boundary = HAL_XSPI_CS_BOUNDARY_NONE;
timing_config.clk_prescaler = 0x1U;
timing_config.shift = HAL_XSPI_SAMPLE_SHIFT_NONE;
timing_config.hold = HAL_XSPI_DELAY_HOLD_NONE;
timing_config.cs_high_time_cycle = 0x1U;
timing_config.cs_release_time_cycle = 0x0U;
timing_config.cs_refresh_time_cycle = 0x0U;
timing_config.dlyb_state = HAL_XSPI_DLYB_ON;
hyperbus_config.rw_recovery_time_cycle = 0x0U;
hyperbus_config.access_time_cycle = 0x0U;
hyperbus_config.write_zero_latency = HAL_XSPI_WRITE_ZERO_LATENCY_DISABLED;
hyperbus_config.latency_mode = HAL_XSPI_LATENCY_VARIABLE;
xspi_config.memory = memory_config;
xspi_config.timing = timing_config;
xspi_config.hyperbus = hyperbus_config;
HAL_XSPI_SetConfig(&hOCTOSPI1, &xspi_config);
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Starting a Write/Read in polling indirect mode ¶
Note
In HAL1, the command sequence can be configured using
HAL_XSPI_HyperbusCmd()
for Hyperbus mode or
HAL_XSPI_Command()
for regular mode.
Sequence diagram ¶
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HAL1 |
HAL2 |
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Usage ¶
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HAL1 |
HAL2 |
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/* Perform the init and configuration as per the first use case*/
XSPI_HandleTypeDef xspi;
XSPI_RegularCmdTypeDef sCommand={0};
scommand.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;
scommand.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;
scommand.InstructionWidth = HAL_XSPI_INSTRUCTION_8_BITS;
scommand.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_DISABLE;
scommand.Instruction = WRITE_REG_CMD;
scommand.AddressMode = HAL_XSPI_ADDRESS_8_LINES;
scommand.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;
scommand.AddressDTRMode = HAL_XSPI_ADDRESS_DTR_ENABLE;
scommand.Address = Address;
scommand.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;
scommand.DataMode = HAL_XSPI_DATA_NONE;
scommand.DataDTRMode = HAL_XSPI_DATA_DTR_ENABLE;
scommand.DataLength = 2;
scommand.DummyCycles = 0;
scommand.DQSMode = HAL_XSPI_DQS_DISABLE;
HAL_XSPI_Command(&xspi, &scommand, XSPI_TIMEOUT);
HAL_XSPI_AutoPolling(&xspi, &sConfig, XSPI_TIMEOUT);
HAL_XSPI_SetFifoThreshold(&xspi, 4);
HAL_XSPI_Command(&xspi, &scommand, XSPI_TIMEOUT);
HAL_XSPI_Transmit(&xspi, ®, XSPI_TIMEOUT);
HAL_XSPI_Command(&xspi, &sCommand, XSPI_TIMEOUT);
HAL_XSPI_AutoPolling(&xspi, &sConfig, XSPI_TIMEOUT);
HAL_XSPI_Command(&xspi, &sCommand, XSPI_TIMEOUT);
HAL_XSPI_Receive(&xspi, (uint8_t *)aRxBuffer, XSPI_TIMEOUT);
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/* Perform the init and configuration as per the first use case*/
hal_xspi_handle_t xspi;
command.operation_type = HAL_XSPI_OPERATION_COMMON_CFG;
command.io_select = HAL_XSPI_IO_7_0;
command.alternate_bytes = 0U;
command.alternate_bytes_width = HAL_XSPI_ALTERNATE_BYTES_8BIT;
command.alternate_bytes_mode = HAL_XSPI_ALTERNATE_BYTES_NONE;
command.alternate_bytes_dtr_mode_status = HAL_XSPI_ALTERNATE_BYTES_DTR_DISABLED;
/* Specific parameters for the Sector Erase command */
command.instruction = WRITE_REG_CMD;
command.instruction_mode = HAL_XSPI_INSTRUCTION_8LINES;
command.instruction_width = HAL_XSPI_INSTRUCTION_32BIT;
command.instruction_dtr_mode_status = HAL_XSPI_INSTRUCTION_DTR_DISABLED;
command.addr = MX25_FIRST_BLOCK_ADDR;
command.addr_mode = HAL_XSPI_ADDR_8LINES;
command.addr_width = HAL_XSPI_ADDR_32BIT;
command.addr_dtr_mode_status = HAL_XSPI_ADDR_DTR_ENABLED;
command.data_mode = HAL_XSPI_REGULAR_DATA_NONE;
command.data_dtr_mode_status = HAL_XSPI_DATA_DTR_ENABLED;
command.dummy_cycle = 0;
command.dqs_mode_status = HAL_XSPI_DQS_DISABLED;
command.size_byte = 2U;
HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);
HAL_XSPI_ExecRegularAutoPoll(&xspi, &pPollingModeCfg, XSPI_TIMEOUT);
HAL_XSPI_SetFifoThreshold(&xspi, 4);
HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);
HAL_XSPI_Transmit(&xspi, p_data, XSPI_TIMEOUT);
HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);
HAL_XSPI_ExecRegularAutoPoll(&xspi, &pPollingModeCfg, XSPI_TIMEOUT);
HAL_XSPI_SendRegularCmd(&xspi, &command, XSPI_TIMEOUT);
HAL_XSPI_Receive(&xspi, (uint8_t *)aRxBuffer, XSPI_TIMEOUT);
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Starting a Write/Read in interrupt mode ¶
Sequence diagram ¶
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HAL1 |
HAL2 |
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Related examples in HAL2 ¶
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Example Name |
Description |
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example_hal_xspi_psram_write_read_it |
How to erase part of a PSRAM memory, write data in Interrupt mode, read data in Interrupt mode. |
Starting a Write/Read in DMA mode ¶
Usage ¶
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HAL1 |
HAL2 |
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XSPI_HandleTypeDef xspi;
XSPI_RegularCmdTypeDef scommand = {0};
scommand.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;
scommand.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;
scommand.InstructionWidth = HAL_XSPI_INSTRUCTION_8_BITS;
scommand.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_DISABLE;
scommand.Instruction = WRITE_REG_CMD;
scommand.AddressMode = HAL_XSPI_ADDRESS_8_LINES;
scommand.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;
scommand.AddressDTRMode = HAL_XSPI_ADDRESS_DTR_ENABLE;
scommand.Address = Address;
scommand.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;
scommand.DataMode = HAL_XSPI_DATA_8_LINES;
scommand.DataDTRMode = HAL_XSPI_DATA_DTR_ENABLE;
scommand.DataLength = 2;
scommand.DummyCycles = 0;
scommand.DQSMode = HAL_XSPI_DQS_DISABLE;
HAL_XSPI_Command(xspi, &scommand, XSPI_TIMEOUT);
HAL_XSPI_Transmit_DMA(xspi, data);
HAL_DMA_IRQHandler(xspi);
HAL_XSPI_TxCpltCallback(xspi);
HAL_XSPI_Command(xspi, &command, XSPI_TIMEOUT);
HAL_XSPI_AutoPolling_IT(xspi, &sConfig);
xspi_IRQHandler(&xspi);
HAL_XSPI_StatusMatchCallback(&xspi);
HAL_XSPI_Command(xspi, &command, XSPI_TIMEOUT);
HAL_XSPI_Receive_DMA(&xspi, (uint8_t *)aRxBuffer);
HAL_DMA_IRQHandler(&xspi);
HAL_XSPI_RxCpltCallback(&xspi);
void HAL_XSPI_TxCpltCallback(XSPI_HandleTypeDef *hxspi)
{
// USER CODE
}
void HAL_XSPI_RxCpltCallback(XSPI_HandleTypeDef *hxspi)
{
// USER CODE
}
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hal_xspi_handle_t xspi;
command.operation_type = HAL_XSPI_OPERATION_COMMON_CFG;
command.io_select = HAL_XSPI_IO_7_0;
command.alternate_bytes = 0U;
command.alternate_bytes_width = HAL_XSPI_ALTERNATE_BYTES_8BIT;
command.alternate_bytes_mode = HAL_XSPI_ALTERNATE_BYTES_NONE;
command.alternate_bytes_dtr_mode_status = HAL_XSPI_ALTERNATE_BYTES_DTR_DISABLED;
/* Specific parameters for the Sector Erase command */
command.instruction = WRITE_REG_CMD;
command.instruction_mode = HAL_XSPI_INSTRUCTION_8LINES;
command.instruction_width = HAL_XSPI_INSTRUCTION_32BIT;
command.instruction_dtr_mode_status = HAL_XSPI_INSTRUCTION_DTR_DISABLED;
command.addr = MX25_FIRST_BLOCK_ADDR;
command.addr_mode = HAL_XSPI_ADDR_8LINES;
command.addr_width = HAL_XSPI_ADDR_8BIT;
command.addr_dtr_mode_status = HAL_XSPI_ADDR_DTR_ENABLED;
command.data_mode = HAL_XSPI_REGULAR_DATA_NONE;
command.data_dtr_mode_status = HAL_XSPI_DATA_DTR_ENABLED;
command.dummy_cycle = 0;
command.dqs_mode_status = HAL_XSPI_DQS_DISABLED;
command.size_byte = 2;
HAL_XSPI_SendRegularCmd(xspi, &command, XSPI_TIMEOUT);
HAL_XSPI_Transmit_DMA(xspi, data);
HAL_DMA_IRQHandler(xspi);
HAL_XSPI_TxCpltCallback(xspi);
HAL_XSPI_SendRegularCmd(xspi, &command, XSPI_TIMEOUT);
sConfig.MatchMode = HAL_XSPI_MATCH_MODE_AND;
sConfig.AutomaticStop = HAL_XSPI_AUTOMATIC_STOP_ENABLE;
sConfig.IntervalTime = 0x10;
sConfig.MatchMask = WRITE_ENABLE_MASK_VALUE;
sConfig.MatchValue = WRITE_ENABLE_MATCH_VALUE;
HAL_XSPI_ExecRegularAutoPoll_IT(xspi, &sConfig);
xspi_IRQHandler(&xspi);
HAL_XSPI_StatusMatchCallback(&xspi);
HAL_XSPI_SendRegularCmd(xspi, &command, XSPI_TIMEOUT);
HAL_XSPI_Receive_DMA(&xspi, (uint8_t *)aRxBuffer);
HAL_DMA_IRQHandler(&xspi);
HAL_XSPI_RxCpltCallback(&xspi);
void HAL_XSPI_TxCpltCallback(XSPI_HandleTypeDef *hxspi)
{
// USER CODE
}
void HAL_XSPI_RxCpltCallback(XSPI_HandleTypeDef *hxspi)
{
// USER CODE
}
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Memory initialization using XSPIM configuration ¶
Sequence diagram ¶
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HAL1 |
HAL2 |
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Usage ¶
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HAL1 |
HAL2 |
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XSPI_HandleTypeDef xspi;
XSPIM_CfgTypeDef sXspiManagerCfg = {0};
sXspiManagerCfg.nCSOverride = HAL_XSPI_CSSEL_OVR_NCS1;
sXspiManagerCfg.IOPort = HAL_XSPIM_IOPORT_1;
HAL_XSPIM_Config(&xspi, &sXspiManagerCfg, XSPI_TIMEOUT);
xspi.Instance = XSPI;
xspi.Init.FifoThresholdByte = 4;
xspi.Init.MemoryMode = HAL_XSPI_SINGLE_MEM;
xspi.Init.MemoryType = HAL_XSPI_MEMTYPE_APMEM_16BITS;
xspi.Init.MemorySize = HAL_XSPI_SIZE_256MB;
xspi.Init.ChipSelectHighTimeCycle = 5;
xspi.Init.FreeRunningClock = HAL_XSPI_FREERUNCLK_DISABLE;
xspi.Init.ClockMode = HAL_XSPI_CLOCK_MODE_0;
xspi.Init.WrapSize = HAL_XSPI_WRAP_NOT_SUPPORTED;
xspi.Init.ClockPrescaler = 0;
xspi.Init.SampleShifting = HAL_XSPI_SAMPLE_SHIFT_NONE;
xspi.Init.DelayHoldQuarterCycle = HAL_XSPI_DHQC_DISABLE;
xspi.Init.ChipSelectBoundary = HAL_XSPI_BONDARYOF_8KB;
xspi.Init.MaxTran = 0;
xspi.Init.Refresh = 0;
xspi.Init.MemorySelect = HAL_XSPI_CSSEL_NCS1;
HAL_XSPI_Init(&xspi);
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hal_xspi_handle_t xspi;
hal_xspi_xspim_config_t sOspiManagerCfg;
sOspiManagerCfg.port1.clk = HAL_XSPI_XSPIM_XSPI1;
sOspiManagerCfg.port1.dqs = HAL_XSPI_XSPIM_XSPI1;
sOspiManagerCfg.port1.ncs = HAL_XSPI_XSPIM_XSPI1;
sOspiManagerCfg.port1.io_low = HAL_XSPI_XSPIM_XSPI1_IO_LOW;
sOspiManagerCfg.port1.io_high = HAL_XSPI_XSPIM_XSPI1_IO_HIGH;
sOspiManagerCfg.req_ack_cycle = 1U;
HAL_XSPI_XSPIM_SetConfig(&sOspiManagerCfg);
HAL_XSPI_Init(&xspi, HAL_OCTOSPI1);
hal_xspi_config_t HAL_XSPI_Global_Cfg_Struct;
HAL_XSPI_Global_Cfg_Struct.memory = HAL_XSPI_Mem_Cfg_Struct;
HAL_XSPI_Global_Cfg_Struct.timing = HAL_XSPI_Timing_Cfg_Struct;
HAL_XSPI_SetConfig(&xspi, &HAL_XSPI_Global_Cfg_Struct);
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Initializing memory with a delay block to adjust timing ¶
Sequence diagram ¶
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HAL1 |
HAL2 |
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Usage ¶
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HAL1 |
HAL2 |
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/* Init and config sequence */
HAL_XSPI_Init(&xspi);
HAL_XSPI_DLYB_SetConfig(&xspi, 2);
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/* */
hal_xspi_config_t HAL_XSPI_Global_Cfg_Struct;
HAL_XSPI_Init(&xspi, HAL_OCTOSPI);
HAL_XSPI_SetConfig(&xspi, &HAL_XSPI_Global_Cfg_Struct);
HAL_XSPI_DLYB_SetConfigDelay(&xspi, 2);
HAL_XSPI_DLYB_Enable(&xspi);
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